1. Field of the Invention
The invention is related to integrated circuits and more particularly to sampling circuits of integrated circuits.
2. Description of the Related Art
A typical receiver front-end circuit uses one or more state elements (e.g., flip-flops) to sample input signals. State elements with short setup and hold times used in high-speed, low-power receiver front-ends include sense amplifier-based flip-flops. However, as clock speeds and/or loading of the receiver circuits increase, limits on the performance of those state elements (e.g., effects of limits on device performance, uncorrected clock duty cycle distortion, and variation of input common-mode voltage levels) affect the amplitude (e.g., voltage swing and signal-to-noise ratio) and timing (e.g., jitter and delay) of the sampled signal.